{"id":32971,"date":"2023-07-27T13:07:00","date_gmt":"2023-07-27T11:07:00","guid":{"rendered":"https:\/\/fhi.nl\/nieuws\/time-to-market-verkorten-zonder-in-te-leveren-op-kwaliteit\/"},"modified":"2024-07-10T13:07:36","modified_gmt":"2024-07-10T11:07:36","slug":"time-to-market-verkorten-zonder-in-te-leveren-op-kwaliteit","status":"publish","type":"news","link":"https:\/\/fhi.nl\/en\/news\/time-to-market-verkorten-zonder-in-te-leveren-op-kwaliteit\/","title":{"rendered":"Shorten time-to-market without sacrificing quality"},"content":{"rendered":"
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\n\t\t\t\t\tShorten time-to-market without sacrificing quality\t\t\t\t<\/h1>\n\n\t\t\t\t
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A short time to market <\/em>is of vital importance for the electronics industry. To stay ahead of the fierce competition, a product must be on the shelf as quickly as possible. But speed should never come at the expense of quality, otherwise the company's reputation will be destroyed faster than the product itself. We will discuss this difficult balance during the seminar '<\/strong>The Influence of Hardware Design on Time-to-Market<\/strong><\/a>' at the E&A fair. Ton Plooy, former director of TBP (currently VDL TBP electronics), will chair the day. <\/strong><\/p>\r\n

Electronics company Aemics<\/a> from Oldenzaal kicks things off with a presentation about the role of a well-thought-out design for a short and high-quality time to market<\/em>. The time you invest in the design in the initial phase will pay for itself in later phases of the development process. Aemics gives its audience a glimpse into the company kitchen and shares best practices <\/em>that you can immediately apply in your own organization.<\/p>\r\n

First prototype
<\/strong>Once the design is in place, it is time for the development and launch of the first prototype. The production of prototypes is often outsourced, although this is not always necessary, according to Stefan Kiel of LPKF. The engineer speaks on behalf of Tooltronics<\/a> about the advantages and disadvantages of in-house design of prototypes. He explains, among other things, how to create PCB prototypes in your own laboratory and what conditions they must meet. He also shows how to post-process, adjust, trim and tune existing PCBs. This significantly reduces the total R&D time and therefore the time-to-market.<\/p>\r\n

Testing in design phase
<\/strong>And it can be even more efficient, as we learn during the lecture CN Rood<\/a>. By checking whether you are on the right track at the start of the development process, design errors are detected and repaired more quickly and you save costs. This seems contradictory, because how can you test a product that does not yet physically exist? CN Rood has a sneak peek of the veil. During the lecture you will learn first-hand how to conduct tests in the design phase and which tools and platforms CN Rood uses to achieve the desired result. \u00a0<\/p>\r\n

Save time
<\/strong>To guarantee the quality of the end product, strict rules have been set up for testing and measuring innovations. Yet it is possible to save time in this area without compromising on quality, explains Christiaan Baaij of QBayLogic<\/a> out. His company has good experiences with 'Property-Based Testing' (PBT) for FPGA designs. During his presentation, Baaij gives some practical examples where PBT has been applied in complex FPGA design scenarios. He also discusses the influence of PBT on the efficiency and reliability of the design. A must visit<\/em> for anyone professionally involved in FPGA design and testing.<\/p>\r\n

Testing complex boards
<\/strong>If you want to know how to test the connections and interfaces of your prototype at an early stage, you can read Rik Doorneweert's lecture JTAG Technologies<\/a> not missing. Doorneweert explains how to combine the JTAG interface with the boundary scan<\/em>capabilities that most microcontrollers, cPLDs, FPGAs and large ICs have today. This way you get an idea of the validation and testing options early in the development stage without using firmware.<\/p>\r\n

Peter van Oostrom ( Romex<\/a>) then rolls up his sleeves. The well-known builder of test solutions from Rhenen knows better than anyone else how to identify the pitfalls in the development and construction of test and measurement setups. And what you can do as a company to avoid these pitfalls. Van Oostrom provides practical advice on positioning, use of materials and other issues that builders encounter during implementation. \u00a0\u00a0<\/p>\r\n

A tip of the veil
<\/strong>Traditionally, we conclude the seminar with an overview lecture, this time given by Steven Van Hout from VDL TBP electronics<\/a>. Van Hout is a specialist in the field of right first time and early involvement. During his lecture he will address the question of how to achieve the best value of ownership by doing it right the first time. This sounds easier than it is. Right first time requires meticulous preparation and close collaboration between the various parties even before the design phase so that you not only design a product that is 'beautiful', but that is also manufacturable. Van Hout will be happy to explain how you approach this and what you should pay attention to during his closing lecture at the fair.<\/p>\r\n

Became curious? Register for free
<\/strong>Have you become curious about the possibilities to shorten the time to market for your company and do you want tips and tricks from the experts in this field? \u00a0Register for the fair and seminar for free.<\/a> \u00a0<\/em>The seminar 'The influence of Hardware Design on Time-to-Market' is on Tuesday, September 26 from 1 p.m.<\/p>\r\n

Click here for an overview of all lectures<\/a><\/p>\r\n

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