We are pleased to inform you that the Allegro & OrCAD 16.6 Quarterly Incremental Release (QiR) #7 is released and made available for our existing maintenance customers.
In case you’re not familiar with QiRs, they are an exciting new way of bringing our users valuable new features without having to wait for 12-18 months for a huge new software release. QiRs simply install on top of your current latest release, they do not affect quality, stability or methodology. What they do bring are a host of new capabilities, most of which will improve your designer’s capabilities and productivity. Imagine not having to load and digest an entire new release just to get access to cool new capabilities and productivity features.
This QiR contains a rich set of new capabilities across all the OrCAD products. Here are some of the key content that you may be interested in:
- New physical DRC check – This new DRC helps ensure that pin numbers on parts are correct checking for missing and invalid pin numbers. It helps prevent incorrect netlists from being sent to PCB. The DRC is Tcl-based and is customizable.
- Object Distribution enhancement – The Object Distribution feature has been enhanced allowing a force of equally spaced object distribution
- BOM ignore update – BOM_IGNORE is now supported for hierarchical designs
- Significant Performance enhancements – New speed levels allow faster switching of devices during simulation resulting in substantial speed improvement. In designs with switches, simulation performance improvements up to 5x can be expected.
- Multi-core simulation support update – Helping to improve performance, the limit on the number of cores that could be utilized during simulation has been removed. Also, the default multi-thread usage of 50% has been removed. PSpice performance will scale for server configurations.
- Convergence improvements – Higher ITL4 values (which had the potential to degrade performance as well as increased probability of numerical overflows) are no longer needed to help avoid convergence errors. Lower values of ITL4 can now be used.
- New PSpice App –The new Hysteresis Core Loss application calculates hysteresis core loss using the B-H loop area from the simulation results, the volume of the core, and the frequency of the operation.
If any of the above interests you then we can send you further information or arrange for a call with one of our technical experts.
If you are currently off-maintenance, we can provide you with a proposal to get back onto maintenance allowing you to take full advantage of the enhancements in this QIR and the latest features of the 16.6 release.