D&E event: New legislation for IoT equipment makes security by design a necessity

On November 17, 18 and 19 finds it Design Automation & Embedded Systems event (D&E) place, this time in digital form. During this event, developers and users share their knowledge in the field of embedded systems and design automation. Over three days, visitors will be updated on current themes through technical and interactive webinars from exhibitors and plenary speakers.

New legislation for IoT devices makes security by design a necessity
With the rapid growth of IoT devices, the demand for better security of this hardware is increasing rapidly. Legislation is now underway that sets minimum requirements for the manufacturer. During the D&E event, this year in a digital edition, security engineer Arne Padmos will delve deeper into how these requirements can be taken into account.

According to Padmos, there has been a lot more attention for the security of IoT devices for the consumer market. And that is not without reason: “During his webinar he will indicate what went wrong in the past in terms of security and discuss current legislation in this area and the guidelines from the government to manufacturers. Click here for the full interview.

The end of 2D NAND is near – what now to do with the “weak” 3D NAND in the industry?
The construction of 3D NAND, also known as V (vertical) NAND, is characterized by the fact that this flash storage is built up from multiple layers. This is in contrast to 2D NAND, which consists of a single two-dimensional layer. The measured lifespan of 3D NAND does not meet the high demands placed on IoT and industrial applications. Ricky Gremmelmaier from Altec (on behalf of Elincom Electronics) takes you in his presentation along with a number of work arounds to to avoid weak points and thus still achieve the desired reliability in terms of lifespan and data security. Read more…

The Challenges of Debugging Mixed Signal Designs
Designs are becoming increasingly larger and more complex and this naturally has a major impact on the verification cycle. Stuart Murlis of PicoTech (on behalf of CN Red) presents in his webinar what challenges there are in the field of debugging and verification and how to solve them. Challenges that are extensively discussed are; signal integrity issues, high-speed event capture, timing and noise margins, intermittent and infrequent errors and correlation. Read more…

Programming models for FPGAs
It is generally accepted that traditional methods of programming an FPGA are cumbersome: VHDL and Verilog only provide low-level abstraction mechanisms, while most high-level synthesis tools are based on a procedural programming language that does not fit the essence of an FPGA. Jan Kuper of QBayLogic discusses a powerful functional specification mechanism (called Clash) that serves as an alternative to mainstream approaches for FPGA design. Read more…

Embedded system and security: why a secure element to support standards and upcoming legislation?
As also described in the introduction of Arne Padmos' lecture, new legislation is coming for IoT equipment. Nicolas Demoulin of Microchip (on behalf of EBV) will highlight in his presentation the status of standards and legislation for connected embedded products from ETSI (European Telecommunications and Standardization Institute), United Kingdom and California. These new laws and standards are driving changes in the development of embedded design, which Demoulin will also discuss in his presentation. Think of Secure elements and scaling up new projects from prototype to pre-production to final mass production. Read more…