SMARC 2.1 Embedded Cortex®-A55 Module

Onderwerp

Design & Embedded Industrial Electronics

The TQMa95xxSA based on the i.MX 95 supports with many features and an integrated NPU (Neural Processor Unit) with up to 2 TOPS and an IPU (Image Processor Unit) in the implementation of applications where artificial intelligence, machine learning/vision is to be applied. A GPU and several graphic interfaces are available for graphically demanding applications. For real-time and security the CPU is supported by a Cortex M33 and Cortex M7 controller.

Main Features

Arm® Cortex® A55 based on i.MX 95
Machine Learning Accelerator 2 TOPS
Integrated Cortex M33 and M7
High-speed communication via 1x 10 Gbit and 2x Gbit Ethernet (1x TSN), 2x PCIe and 1x USB 3.0 interface
MIPI CSI with ISP support
Low power consumption (typ. 6 W)
Integrated security functions

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Main Features

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